gPTP / STBM Time Synchronization

Detailed explanation · IEEE 802.1AS gPTP · IEEE 1588 PTP · AUTOSAR Synchronized Time-Base Manager

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This page explains how time is synchronized from a grandmaster clock to a slave device over Automotive/TSN Ethernet using gPTP (generalized Precision Time Protocol, IEEE 802.1AS) and how the STBM (Synchronized Time-Base Manager) in AUTOSAR consumes that time. It walks through every timestamp and every configuration option exposed by the simulator: 1-step vs 2-step, hardware vs software timestamping, and with vs without the Pdelay handshake — each with worked numeric examples.

1. Roles & the big picture

A time-synchronized network has one authoritative clock and one or more devices that follow it:

Two independent measurements combine to synchronize the slave:

  1. Offset measurement (Sync / Follow_Up): "How far ahead/behind the master am I right now?"
  2. Path-delay measurement (Pdelay handshake): "How long does a frame take to travel the cable between us?"

The path delay is subtracted from the offset measurement because the Sync message itself takes time to arrive — without removing it, the slave would always think it is late by exactly the propagation delay.

2. Terminology — every symbol used

t₁preciseOriginTimestamp. The moment the master transmits the Sync frame (master egress). Carried in the Sync frame (1-step) or the Follow_Up (2-step).
t₂Sync ingress timestamp. The moment the Sync frame arrives at the slave (slave receive). Captured by the slave's MAC (HW) or software (SW).
δmeanPathDelay. One-way propagation delay of the link, measured by the Pdelay handshake. Subtracted from the offset.
ccorrectionField. Residence + link corrections accumulated by transparent/bridge clocks as the Sync passes through them. In this simulator it models the master's residence time.
Δppoll / notify delay. The software RX processing delay at the slave — how long between the frame hitting the port and the STBM actually reading it (Ethernet driver poll period + bus contention). Only corrupts the result under SW timestamping.
offsetoffsetFromMaster. How far the slave clock is ahead of the master. The value the slave subtracts from its clock to synchronize.
SyncgPTP event message carrying (1-step) or announcing (2-step) t₁.
Follow_UpgPTP general message (2-step only) carrying the precise t₁ and correctionField measured at Sync egress.
Pdelay_ReqPeer-delay request sent by the slave to start a link-delay measurement.
Pdelay_RespPeer-delay response (+ optional Follow_Up) returned by the master, carrying its RX/TX timestamps.
residenceTime a message spends inside a device (bridge/switch) between ingress and egress; folded into the correctionField c.
holdoverState where the slave keeps running on its own oscillator because incoming syncs failed a plausibility check or stopped arriving.
timeLeapSTBM flag raised when a single correction is large enough to be a discontinuous "jump" of the time base (≥ configured threshold).
ppmParts per million — the frequency error (drift rate) of an oscillator. 1 ppm ≈ 1 µs of drift every second.
rateRationeighborRateRatio. The ratio of master to slave clock frequency, measured from how much master time elapses vs. how much the slave's own clock advances between two Sync messages. rateRatio > 1 means the slave runs slower than the master.
rateCorrThe frequency correction (in ppm) the servo applies to the slave oscillator so its rate matches the master — the running output of syntonization.
syntonizationMatching a clock's frequency (rate) to a reference, as opposed to synchronization which matches its phase (absolute value). A good servo does both.
servoThe closed-loop controller (here a PI controller) that continuously steers the slave rate to drive the measured offset toward zero, with acquiringlocked states.

3. The core offset calculation

All of gPTP boils down to one equation the slave evaluates every Sync interval. Given the four quantities above:

offsetFromMaster = t₂t₁δc

Intuition, term by term:

Whatever is left is the genuine clock error. The slave then corrects itself:

slaveClock := slaveClock − offsetFromMaster

A positive offset means the slave is ahead of the master, so it steps its clock back; a negative offset means it is behind, so it steps forward.

Which timestamp belongs to whom? t₁ is a master timestamp (Sync egress at the master) — this is why, in the simulator, t₁ appears on the master side the instant the Sync frame departs. t₂ is the slave timestamp (Sync ingress). The offset can only be finalized once both have been captured — and in 2-step mode, once the Follow_Up delivers the precise t₁ and c.

4. Peer path delay (the Pdelay handshake)

To measure δ, the slave and master exchange a small four-timestamp handshake. Note these t₁…t₄ are a different set from the Sync t₁/t₂ above — they belong only to the Pdelay exchange:

t₁Pdelay_Req egress at the slave (requester sends).
t₂Pdelay_Req ingress at the master (responder receives).
t₃Pdelay_Resp egress at the master (responder sends back).
t₄Pdelay_Resp ingress at the slave (requester receives).

The one-way delay is the round trip minus the master's turnaround time, halved:

δ = ((t₄t₁) − (t₃t₂)) / 2
Why halving works The subtraction cancels the slave↔master clock offset entirely (it appears with opposite signs on the two legs), so δ is measured correctly even before the clocks are synchronized. That is why Pdelay can run independently of, and before, the Sync offset correction.

Example — measuring δ

t₁ = 1000.000 µs (req sent by slave)
t₂ = 1000.500 µs (req arrives at master)
t₃ = 1010.500 µs (master replies 10 µs later)
t₄ = 1011.000 µs (reply arrives at slave)
round trip = t₄ − t₁ = 11.000 µs
turnaround = t₃ − t₂ = 10.000 µs
δ = (11.000 − 10.000) / 2 = 0.500 µs

5. One-step vs two-step timestamping

The master must place its exact transmit time (t₁) into the message. But at the instant the hardware starts sending the Sync, it does not yet know the final egress timestamp. There are two ways to solve this:

Sync delivery of t₁
Aspect2-step1-step
MessagesSync then Follow_UpSync only
Where t₁ & c liveIn the Follow_Up, measured precisely at Sync egressInserted into the Sync frame on the fly by hardware
HW requirementLower — just needs an egress timestamp readbackHigher — MAC must rewrite the frame & fix the FCS at line rate
Latency to resultSlightly higher (waits for the 2nd message)Lower (everything in one frame)
In the simulatorSync reveals t₁ & t₂; Follow_Up reveals c & Δp, then the offset is computedSync alone reveals t₁, t₂, c & Δp
Same math, different plumbing The offset equation is identical in both modes. The only difference is when t₁ and c become available to the slave: in 2-step they arrive with the follow-up message; in 1-step they are already inside the Sync frame. That is why the simulator finalizes the calculation on Follow_Up arrival (2-step) vs on Sync arrival (1-step).

6. Hardware vs software timestamping

The accuracy of t₂ (Sync ingress) depends entirely on where the timestamp is captured in the receive path:

Capturing t₂ at the slave
AspectHW timestampingSW timestamping
Capture pointIn the MAC/PHY at the exact moment the frame crosses the wireIn the driver/stack when software gets around to reading the frame
Effect of poll delay ΔpNone on the value — Δp only delays when STBM is updated, not the timestamp itselfLeaks directly into t₂ as error + jitter
Offset equationt₂ − t₁ − δ − ct₂ − t₁ − δ − c where t₂ is inflated by Δp → error ≈ Δp
Typical accuracySub-microsecondTens of µs to milliseconds, jittery

In the simulator, the RX processing path is drawn as the dashed Δp leg from the SLAVE PORT to the STBM calc point. With HW timestamping, t₂ is latched at the port (start of that leg) so Δp is harmless. With SW timestamping, t₂ is effectively taken at the end of the leg, so the whole Δp is added into the measured offset as error:

SW: offset = t₂t₁δcΔp (Δp is a correction the slave tries — but Δp is variable, so residual error & jitter remain)
Why SW timestamping hurts Δp is not constant — it depends on the driver poll period and momentary bus load. Even if the slave subtracts an average Δp, the run-to-run variation shows up as sync jitter. HW timestamping removes the variable entirely, which is why automotive TSN mandates MAC-level timestamping for the tightest time bases.

7. With vs without Pdelay

Pdelay is what supplies δ. What happens if it is disabled?

Effect of the Pdelay handshake
AspectPdelay ONPdelay OFF
δ sourceMeasured continuously from the 4-timestamp handshakeAssumed 0 (or a static configured value)
Offset equationt₂ − t₁ − δ − ct₂ − t₁ − c (δ term dropped)
Residual error≈ 0 from path delayThe entire link propagation delay stays uncompensated — the slave is offset by δ permanently
When acceptableAlways the correct choice for accuracyOnly for very short links where δ is negligible, or lab/demo setups
Concrete impact If the cable delay is 300 ns and Pdelay is off, the slave will settle 300 ns behind the master forever — because it never learns the Sync frame was 300 ns old on arrival. With Pdelay on, that 300 ns is measured and removed. In the simulator, turning Pdelay off drops the δ term from the formula and prints a note that the static link delay is left uncompensated.

8. What the STBM does with the corrected time

gPTP produces a corrected time; the STBM turns it into a robust, application-facing synchronized time base. Its jobs:

Plausibility window example If the last good sync was 100 ms ago, the window is 6.25% × 100 ms = ±6.25 ms. An offset of 2 ms is applied; an offset of 10 ms is rejected → holdover.

9. Phase vs frequency correction — the servo & rateRatio

Correcting a clock has two independent parts. Getting the slave to read the same value as the master is phase correction (synchronization). Getting the slave to tick at the same rate as the master is frequency correction (syntonization). A naïve implementation only does the first; a real gPTP/STBM stack does both.

Why phase-only correction produces a sawtooth

If the slave oscillator is, say, 2000 ppm slow, it loses 2 µs of time every millisecond. A phase-only servo waits for each Sync, computes the offset, and hard-steps the clock back onto the master — then does nothing until the next Sync, during which the clock drifts away again at the full 2000 ppm. The result is the familiar sawtooth: snap to zero, drift, snap, drift. The average error is non-zero and every correction is a small discontinuity.

What the frequency servo does instead

A frequency (PI) servo does not jump the clock. From each Sync it estimates the residual rate error and adjusts the speed at which the slave clock advances — a correction expressed in ppm (rateCorr). Once it has learned the oscillator's drift, that steady rate correction cancels the drift, so between syncs the slave stays aligned instead of running away. The deviation curve collapses from a sawtooth into a flat, converging line.

The servo used here is a classic proportional-integral (PI) controller:

rateCorr = −( Kp·e + Ki·∫e )
Acquiring → Locked While the residual rate error is still large the servo is acquiring. After several consecutive syncs with a small residual error it latches LOCKED — the equivalent of a real stack declaring its time base valid.

rateRatio — measuring the frequency ratio

To correct the rate you first have to measure it. rateRatio (called neighborRateRatio in 802.1AS) is the ratio of master frequency to slave frequency. It is measured from two consecutive Sync exchanges by comparing how much master time elapsed with how much the slave's own hardware clock advanced:

rateRatio = (t₁ − t₁prev) / (t₂HW − t₂HW,prev)

In a real multi-hop network every bridge measures the rateRatio of its upstream link and passes an accumulated ratio downstream, so each device can scale the correctionField and residence times into its own timescale. In this single-hop simulator the measured rateRatio feeds the servo and is shown live in the rateRatio tile alongside the current rateCorr (ppm) and the acquiring/LOCKED state.

Try it Use the Correction mode control in the slave-clock panel to switch between Phase only (step) and Phase + frequency (servo). In phase-only mode the deviation is a sawtooth; switch to the servo and watch it converge to a flat line as the rateRatio tile moves from acquiring to LOCKED. The steeper the oscillator error (Slave clock frequency), the more obvious the difference.

How this maps to AUTOSAR StbMTimeCorrection

In a real AUTOSAR stack the phase-vs-frequency choice is not a single toggle — it is configured through the StbMTimeCorrection container on a synchronized (slave) time base. That container exposes the same two mechanisms this simulator models, just with more granularity:

Simulator "Correction mode" vs the ECU configuration
MechanismIn this simulatorAUTOSAR StbMTimeCorrection parameters
Phase (offset) Applied as an immediate hard step every sync. A step ≥ the STBM time-leap threshold raises timeLeap. StbMOffsetCorrectionJumpThreshold (jump vs ramp boundary) and StbMOffsetCorrectionAdaptationInterval (window over which a sub-threshold offset is ramped in smoothly instead of jumped).
Frequency (rate) A continuous PI servo estimates the residual rate error and outputs rateCorr (ppm). StbMRateCorrectionMeasurementDuration (window used to measure drift) and StbMRateCorrectionsPerMeasurementDuration (how many samples per window).
Master rate (gateway) Not modelled — single master → single slave. StbMAllowMasterRateCorrection and StbMMasterRateDeviationMax — only for a time gateway (slave upstream, master downstream) that corrects its own rate before forwarding time.
Same intent, simplified mechanism The simulator's Phase + frequency (servo) mode corresponds to enabling both offset and rate correction in StbMTimeCorrection. Two deliberate simplifications: (1) real STBM rate correction is a windowed measurement average recomputed each MeasurementDuration, not a continuous PI loop; and (2) real offset correction is threshold-gated — small errors ramp over the adaptation interval (smooth, monotonic) while only large ones jump — whereas the simulator always applies phase as a hard step and flags large steps as timeLeap.

10. The epoch value — is a non-zero epoch a convention?

The simulator's Epoch field is essentially cosmetic, but it mirrors something real about how PTP time is represented. Real PTP time is never zero-based from "simulation start" — the timestamps are seconds/nanoseconds since a defined epoch, and that epoch is a large fixed point in the past.

Standard epochs

PTP / 15881 January 1970, 00:00:00 TAI (the "PTP epoch"). Time is counted as TAI (International Atomic Time), so it does not include leap seconds.
gPTP / 802.1ASSame 1970 TAI epoch for the grandmaster's preciseOriginTimestamp, though 802.1AS is often used as an arbitrary / relative timescale where the master just counts from power-on.
GPS timeDifferent epoch: 6 January 1980.
Unix time1970 UTC (with leap seconds), which is why PTP↔UTC differ by the current TAI−UTC offset (37 s as of 2026).

Why a non-zero epoch matters

  1. Realistic magnitude / wraparound testing. PTP seconds are a 48-bit field and nanoseconds a 32-bit field. Today's TAI value is ~1.77 × 10⁹ seconds since 1970. Using a large epoch exercises the same high-order bits and 32-bit millisecond wrap that a real device sees, instead of tiny near-zero numbers that never stress rollover.
  2. It's what the wire actually carries. A grandmaster transmits absolute timestamps, not "ms since boot." A large value makes the display honest.
  3. Cosmetic only for accuracy. Epoch just shifts the absolute display; it does not change offsets, δ, or accuracy — those are all differences, so the epoch cancels out.

Typical non-zero value

To look like a real automotive/PTP clock, use current TAI seconds since 1970, in the simulator's millisecond unit:

Other realistic choices:

Bottom line A non-zero epoch is the norm because PTP timestamps are absolute (seconds since 1970 TAI). In this simulator it only changes the displayed wall-clock magnitude — every offset and delay is a difference, so accuracy is unaffected by whatever epoch you choose.

11. Full worked example (2-step, HW, Pdelay on)

Given

Pdelay result: δ = 0.300 µs = 0.000300 ms
Master residence: c = 4.00 µs = 0.004000 ms
Slave is running 2.000 ms ahead of the master (true offset)
 

Sync exchange

t₁ = 125.000000 ms (master sends Sync — preciseOriginTimestamp)
t₂ = 127.004300 ms (slave MAC latches ingress)
 

Compute offset

offset = t₂t₁δc
= 127.004300 − 125.000000 − 0.000300 − 0.004000
= +2.000000 ms → slave is 2 ms ahead
 

Correct

slaveClock := slaveClock − 2.000000 ms (step back)
Plausibility (last sync 125 ms ago): window = 6.25% × 125 = ±7.81 ms
|2.0 ms| < 7.81 ms → SYNC APPLIED ✓

Now compare the same scenario with SW timestamping and a poll delay Δp = 0.250 ms:

SW timestamping — t₂ is taken 0.250 ms late

t₂ = 127.254300 ms (0.250 ms later than HW would)
offset = 127.254300 − 125.000000 − 0.000300 − 0.004000
= +2.250000 ms → 0.250 ms of error injected by Δp
Because Δp varies every cycle, this 0.25 ms also jitters run-to-run.

And the same scenario with Pdelay off (δ dropped):

Pdelay off — δ assumed 0

offset = t₂t₁c (no δ term)
= 127.004300 − 125.000000 − 0.004000
= +2.000300 ms → 0.300 µs of link delay left uncompensated forever

12. Cheat sheet

Offset (Sync): offset = t₂t₁δc Path delay: δ = ((t₄t₁) − (t₃t₂)) / 2 Phase corr.: slaveClock := slaveClock − offset (hard step) rateRatio: r = (t₁ − t₁ₚᵣₑᵥ) / (t₂ₕw − t₂ₕwₚᵣₑᵥ) (>1 ⇒ slave slow) Freq. servo: rateCorr = −(Kₚ·e + Kᵢ·∫e) ppm (no step, converges)

13. Standards & references

The behavior modeled here is defined across IEEE timing standards and the AUTOSAR time-synchronization stack. The primary normative documents:

IEEE — gPTP & PTP

AUTOSAR — Ethernet Time Synchronization & STBM

Supporting / background

Document versions Links above point to AUTOSAR Classic Platform R22-11 releases and the current IEEE standard pages; exact clause numbers vary between AUTOSAR releases (R19-11 … R23-11) and between the 2011 and 2020 editions of 802.1AS. Always cross-check against the release your project targets. AUTOSAR specifications are freely downloadable from autosar.org.

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